Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology

Inicio | ¿Qué es? | Contacto

English | Català

Consultar RECERCAT

Por comunidades y
colecciones Por fecha Por autores Por títulos Por temas (CDU)

Consultar departamento

Por fecha Por autores Por títulos Por temas (CDU)

Estadisticas

Del documento Todo RECERCAT

Mi RECERCAT

Entrar Alertas por correo-e

Directorio de otros repositorios

RECERCAT Principal > Universitat Politècnica de Catalunya > Documents de recerca > Visualizar documento

Para acceder a los documentos con el texto completo, por favor, siga el siguiente enlace: http://hdl.handle.net/2117/130108

dc.contributor	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica
dc.contributor	Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
dc.contributor.author	Barajas Ojeda, Enrique
dc.contributor.author	Aragonès Cervera, Xavier
dc.contributor.author	Mateo Peña, Diego
dc.contributor.author	Moll Echeto, Francisco de Borja
dc.contributor.author	Rubio Sola, Jose Antonio
dc.contributor.author	Martin Martínez, Javier
dc.contributor.author	Rodríguez Martínez, Rosana
dc.contributor.author	Porti Pujal, Marc
dc.contributor.author	Nafria, M.
dc.contributor.author	Castro López, Rafael
dc.contributor.author	Roca Moreno, Elisenda
dc.contributor.author	Fernandez, Francisco V.
dc.date	2018
dc.identifier.citation	Barajas, E. [et al.]. Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology. A: International Workshop on Power and Timing Modeling, Optimization and Simulation. "2018 IEEE 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS 2018): 2-4 July 2018, Spain". Institute of Electrical and Electronics Engineers (IEEE), 2018, p. 82-87.
dc.identifier.citation	9781538663653
dc.identifier.citation	10.1109/PATMOS.2018.8464145
dc.identifier.uri	http://hdl.handle.net/2117/130108
dc.language.iso	eng
dc.publisher	Institute of Electrical and Electronics Engineers (IEEE)
dc.relation	https://ieeexplore.ieee.org/document/8464145
dc.relation	info:eu-repo/grantAgreement/ES/1PE/TEC2016-75151-C3-2-R
dc.rights	info:eu-repo/semantics/openAccess
dc.subject	Àrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics
dc.subject	Electronic circuits
dc.subject	Body Bias
dc.subject	FDSOI
dc.subject	Jitter
dc.subject	Ring Oscillators
dc.subject	RTN
dc.subject	Ultra-Low Voltage Jitter
dc.subject	Low power electronics
dc.subject	MOS devices
dc.subject	Oscillators (electronic)
dc.subject	Threshold voltage
dc.subject	Body bias
dc.subject	FDSOI
dc.subject	Fdsoi technologies
dc.subject	Oscillation frequency
dc.subject	Random telegraph noise
dc.subject	Ring oscillator
dc.subject	Threshold voltage variation
dc.subject	Ultra-low-voltage
dc.subject	Bias voltage
dc.subject	Circuits electrònics
dc.title	Analysis of body bias and RTN-induced frequency shift of low voltage ring oscillators in FDSOI technology
dc.type	info:eu-repo/semantics/publishedVersion
dc.type	info:eu-repo/semantics/conferenceObject
dc.description.abstract	Electronic circuits powered at ultra low voltages (500 mV and below) are desirable for their low energy and power consumption. However, RTN (Random Telegraph Noise)-induced threshold voltage variations become very significant at such supply voltages. This paper evaluates the impact of RTN on additional jitter in a ring oscillator. Since FDSOI allows a large range of body bias voltages, this work studies how body biasing affects the oscillation frequency but also the jitter effects. The impact of RTN in NMOS and PMOS devices on frequency as well as the levels of supplementary jitter introduced by RTN are evaluated and compared with classical device noise.
dc.description.abstract	Peer Reviewed

Mostrar el registro sencillo del ítem

Documentos relacionados

Otros documentos del mismo autor/a

A versatile CMOS transistor array IC for the statistical characterization of time-zero variability, RTN, BTI, and HCI

Diaz Fortuny, Javier; Martin Martínez, Javier; Rodríguez Martínez, Rosana; Castro López, Rafael; Roca Moreno, Elisenda; Aragonès Cervera, Xavier; Barajas Ojeda, Enrique; Mateo Peña, Diego; Fernández Fernández, Francisco V.; Nafría Maqueda, Montserrat

Aging in CMOS RF linear power amplifiers: experimental comparison and modeling

Aragonès Cervera, Xavier; Mateo Peña, Diego; Barajas Ojeda, Enrique; Crespo-Yepes, A.; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat

MOSFET degradation dependence on input signal power in a RF power amplifier

Crespo Yepes, Albert; Barajas Ojeda, Enrique; Martin Martínez, Javier; Mateo Peña, Diego; Aragonès Cervera, Xavier; Rodríguez Martínez, Rosana; Nafría Maqueda, Montserrat

Design of a broadband CMOS RF power amplifier to establish device-circuit aging correlations

Barajas Ojeda, Enrique; Mateo Peña, Diego; Aragonès Cervera, Xavier; Crespo Yepes, Albert; Rodríguez Martínez, Rosana; Martin Martínez, Javier; Nafría Maqueda, Montserrat

Fast time-to-market with via-configurable transistor array regular fabric: A delay-locked loop design case study

González Colás, Antonio María; Pons Solé, Marc; Barajas Ojeda, Enrique; Mateo Peña, Diego; López González, Juan Miguel; Moll Echeto, Francisco de Borja; Rubio Sola, Jose Antonio; Abella Ferrer, Jaume; Vera Rivera, Francisco Javier

Accesibilidad | Aviso legal | Política de Cookies | Documentos de uso interno

Coordinación

Patrocinio