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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Sanyal, Sutirtha |
dc.contributor.author | Roy, Sourav |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.author | Unsal, Osman Sabri |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2009 |
dc.identifier.citation | Sanyal, S., Roy, S., Cristal, A., Unsal, O., Valero, M. Clock gate on abort: Towards energy-efficient hardware transactional memory. A: IEEE International Parallel and Distributed Processing Symposium. "IPDPS 2009 Rome: proceedings of the 23rd IEEE International Parallel and Distributed Processing Symposium". Roma: Institute of Electrical and Electronics Engineers (IEEE), 2009, p. 1-8. |
dc.identifier.citation | 978-1-4244-3750-4 |
dc.identifier.citation | 10.1109/IPDPS.2009.5160971 |
dc.identifier.uri | http://hdl.handle.net/2117/110073 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=5160971 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Multiprocessors -- Programming |
dc.subject | Parallel programming (Computer science) |
dc.subject | Hardware transactional memory |
dc.subject | Clock gating |
dc.subject | Distributed shared memory architecture |
dc.subject | Transaction abort |
dc.subject | Low-power architecture |
dc.subject | Multiprocessadors -- Programació |
dc.subject | Programació en paral·lel (Informàtica) |
dc.title | Clock gate on abort: Towards energy-efficient hardware transactional memory |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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