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An hybrid eDRAM/SRAM macrocell to implement first-level data caches
Valero, Alejandro; Sahuquillo, Julio; Petit, Salvador; Lorente, Vicente; Canal Corretger, Ramon; López, Pedro; Duato, José
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
Computer storage devices
Static and dynamic memory cells
Retention time
Leakage current
Ordinadors -- Memòries
info:eu-repo/semantics/publishedVersion
info:eu-repo/semantics/conferenceObject
Association for Computing Machinery (ACM)
         

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