Turquoise - 12nm 32-core RISC-V chip with a coherent mesh fabric for datacenter applications

Author

Tan, Zhangxi

Publication date

2024-04-10



Abstract

In this talk, we will present Turquoise, a 64-bit 32-core Out-Of-Order RISC-V CPU chip with three levels of caches designed for datacenter applications supporting the RVA23 profile. Turquoise is fabbed with the TSMC 12nm process technology with a frequency of 2.0 GHz without overdrive. The die size is ~400 mm^2. The custom designed RISC-V core has a 512-bit vector engine supporting the full RISC-V vector extension 1.0. The core also has the latest RISC-V advance interrupt standard (AIA) and H-mode implementation to run the Xen virtualization software. Turquoise will be available with a server system board design in the E-ATX form factor. We will share our experience in architecture and silicon implementations along with our future designs of RISC-V chips.

Document Type

Conference report

Language

English

Publisher

Barcelona Super Computer Center. Education & Training team

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Rights

http://creativecommons.org/licenses/by-nc-nd/4.0/

Open Access

Attribution-NonCommercial-NoDerivatives 4.0 International

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Congressos [11156]