Reinventing virtual memory for modern hardware

Abstract

Paged-based virtual memory forms the basis of memory management in modern hardware and has in the past decades been extended with support for accelerators and I/O devices. As memory sizes grow to terabytes and beyond, though, the complexity and overhead of address translation has become costly. My research group has been tackling this problem for a decade, looking for ways to provide the flexibility and benefit of paged-based memory at greater efficiencies. In this talk, I will cover our recent work on how to adapt virtual memory mechanisms in hardware and software for modern computing environments. First, I'll discuss devirtualized memory for computation accelerators, a hardware mechanism that provides the protection benefits of virtual memory at lower cost by removing address translation. Second, I'll talk BypassD, which enables user-space access to files without kernel interference on the datapath. It moves storage address translation into hardware to greatly reduce latency.