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dc.contributor | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
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dc.contributor.author | Landauer, Gerhard Martin |
dc.contributor.author | González Jiménez, José Luis |
dc.contributor.author | Jiménez Jiménez, David |
dc.date | 2014-06-04 |
dc.identifier.citation | Landauer, G.M.; González, J.L.; Jiménez, D. An accurate and Verilog-A compatible compact model for graphene field-effect transistors. "IEEE transactions on nanotechnology", 04 Juny 2014, vol. 13, núm. 5, p. 895-904. |
dc.identifier.citation | 1536-125X |
dc.identifier.citation | 10.1109/TNANO.2014.2328782 |
dc.identifier.uri | http://hdl.handle.net/2117/24401 |
dc.language.iso | eng |
dc.relation | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6825842 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics |
dc.subject | Nanotechnology |
dc.subject | Dirac point |
dc.subject | GFET-based integrated circuit design |
dc.subject | Verilog-A compatible compact model |
dc.subject | circuit simulators |
dc.subject | current saturation |
dc.subject | current-voltage relation |
dc.subject | drain current |
dc.subject | drift-diffusion model |
dc.subject | energy levels |
dc.subject | graphene field-effect transistor |
dc.subject | intrinsic gain |
dc.subject | low-voltage biasing regime |
dc.subject | output conductance |
dc.subject | transconductance |
dc.subject | Nanotecnologia |
dc.title | An accurate and Verilog-A compatible compact model for graphene field-effect transistors |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/article |
dc.description.abstract | |
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