Bipolar transistor vertical vertical scaling framework

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Title:	Bipolar transistor vertical vertical scaling framework
Author:	Castañer Muñoz, Luis María; Alcubilla González, Ramón; Benavent, A
Other authors:	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. MNT - Grup de Recerca en Micro i Nanotecnologies
Abstract:	Scaling factors for current and transit time are derived for polysilicon emitter, silicon based heterojunction bipolar transistors. It is shown that a simple set of analytical equations in integral form can be used to analyse the above scaling properties and by introducing two “heterojunction factors” can be extended to the scaling analysis of heterojunction bipolar transistors.
Abstract:	Peer Reviewed
Subject(s):	-Àrees temàtiques de la UPC::Enginyeria electrònica::Components electrònics::Transistors -Transistors -Transistors
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Document type:	Article - Published version Article
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