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dc.contributor | Universitat Politècnica de Catalunya. Departament de Ciències de la Computació |
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dc.contributor | Universitat Politècnica de Catalunya. ALBCOM - Algorismia, Bioinformàtica, Complexitat i Mètodes Formals |
dc.contributor.author | Kam, Timothy |
dc.contributor.author | Kishinevsky, Michael |
dc.contributor.author | Cortadella, Jordi |
dc.contributor.author | Galcerán Oms, Marc |
dc.date | 2008 |
dc.identifier.citation | Kam, T. [et al.]. Correct-by-construction microarchitectural pipelining. A: IEEE/ACM International Conference on Computer-Aided Design. "2008 IEEE/ACM International Conference on Computer-Aided DesignDigest of Technical Papers". Institute of Electrical and Electronics Engineers (IEEE), 2008, p. 434-441. |
dc.identifier.citation | 978-1-4244-2819-9 |
dc.identifier.citation | 10.1109/ICCAD.2008.4681612 |
dc.identifier.uri | http://hdl.handle.net/2117/130965 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | https://ieeexplore.ieee.org/document/4681612 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Logic circuits |
dc.subject | Microarchitecture |
dc.subject | Pipeline processing |
dc.subject | Radio frequency |
dc.subject | Delay |
dc.subject | Logic |
dc.subject | Distributed control |
dc.subject | Hazards |
dc.subject | Systolic arrays |
dc.subject | Throughput |
dc.subject | Synchronous generators |
dc.subject | Circuits lògics |
dc.title | Correct-by-construction microarchitectural pipelining |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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