Título:
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Shared resource aware scheduling on power-constrained tiled many-core processors
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Autor/a:
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Jha, Sudhanshu Shekhar; Heirman, Wim; Falcón Samper, Ayose Jesús; Tubella Murgadas, Jordi; González Colás, Antonio María; Eeckhout, Lieven
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Otros autores:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
Abstract:
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Power management through dynamic core, cache and frequency adaptation is becoming a necessity in today's power-constrained many-core environments. Unfortunately, as core count grows, the complexity of both the adaptation hardware and the power management algorithms increases. In this paper, we propose a two-tier hierarchical power management methodology to exploit per-tile voltage regulators and clustered last-level caches. In addition, we include a novel thread migration layer that (i) analyzes threads running on the tiled many-core processor for shared resource sensitivity in tandem with core, cache and frequency adaptation, and (ii) co-schedules threads per tile with compatible behavior. |
Abstract:
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Peer Reviewed |
Materia(s):
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors -Microprocessors -- Energy consumption -Dynamic cores -Frequency adaptation -Last-level caches -Many core -Many-core processors -Power management algorithms -Shared resources -Thread migration -Microprocessadors -- Consum d'energia |
Derechos:
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Tipo de documento:
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Artículo - Versión presentada Objeto de conferencia |
Editor:
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Association for Computing Machinery (ACM)
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