To access the full text documents, please follow this link: http://hdl.handle.net/2117/122769
Title: | HWP: hardware support to reconcile cache energy, complexity, performance and WCET estimates in multicore real-time systems |
---|---|
Author: | Benedicte Illescas, Pedro; Hernandez, C.; Abella Ferrer, Jaume; Cazorla Almeida, Francisco Javier |
Other authors: | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
Abstract: | |
Abstract: | |
Subject(s): | -Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles -High performance computing -Multicores -Multilevel caches -Real-time systems -WCET -Complex networks -Embedded systems -Hardware -Integrated circuit design -Interactive computer systems -Interconnection networks (circuit switching) -Reliability -Cache coherence protocols -Guaranteed performance -Hardware mechanism -High performance processors -Multi-cores -Multi-level cache -Reduced coherences -WCET -Real time systems -Càlcul intensiu (Informàtica) |
Rights: | Attribution-NonCommercial-NoDerivs 3.0 Spain
http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
Document type: | Article - Published version Conference Object |
Published by: | Schloss Dagstuhl - Leibniz-Zentrum für Informatik |
Share: |