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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor.author | Codina Viñas, Josep M. |
dc.contributor.author | Sánchez Navarro, F. Jesús |
dc.contributor.author | González Colás, Antonio María |
dc.date | 2001 |
dc.identifier.citation | Codina, J.M., Sánchez, F., González, A. A unified modulo scheduling and register allocation technique for clustered processors. A: International Conference on Parallel Architectures and Compilation Techniques. "2001 International Conference on Parallel Architectures and Compilation Techniques: 8-12 September 2001 Barcelona, Catalunya, Spain: proceedings". Barcelona: Institute of Electrical and Electronics Engineers (IEEE), 2001, p. 175-184. |
dc.identifier.citation | 0-7695-1363-8 |
dc.identifier.citation | 10.1109/PACT.2001.953298 |
dc.identifier.uri | http://hdl.handle.net/2117/101361 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=953298 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Compilers (Computer programs) |
dc.subject | Multiprocessors |
dc.subject | Modulo scheduling |
dc.subject | Register allocation |
dc.subject | Spill code |
dc.subject | Cluster assignment |
dc.subject | Clustered architectures |
dc.subject | Compiladors (Programes d'ordinador) |
dc.subject | Multiprocessadors |
dc.title | A unified modulo scheduling and register allocation technique for clustered processors |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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