Universitat Politècnica de Catalunya. Doctorat en Enginyeria Elèctrica
Universitat Politècnica de Catalunya. Departament d'Enginyeria Elèctrica
Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
Barcelona Supercomputing Center
Universitat Politècnica de Catalunya. CITCEA-UPC - Centre d'Innovació Tecnològica en Convertidors Estàtics i Accionaments
2026-07-01
Digital twins are transforming the way we monitor, analyze, and control physical systems, but designing architectures that balance real-time responsiveness with heavy computational demands remains a challenge. Cloud-based solutions often struggle with latency and resource constraints, while edge-based approaches lack the processing power for complex simulations and data-driven optimizations. To address this problem, we propose the High-Precision High-Performance Computer-enabled Digital Twin (HP2C-DT) reference architecture, which integrates High-Performance Computing (HPC) into the computing continuum. Unlike traditional setups that use HPC only for offline simulations, HP2C-DT makes it an active part of digital twin workflows, dynamically assigning tasks to edge, cloud, or HPC resources based on urgency and computational needs. Furthermore, to bridge the gap between theory and practice, we introduce the HP2C-DT framework, a working implementation that uses COMPSs for seamless workload distribution across diverse infrastructures. We test it in a power grid use case, showing how it reduces communication bandwidth by an order of magnitude through edge-side data aggregation, improves response times by up to 2x via dynamic offloading, and maintains near-ideal strong scaling for compute-intensive workflows across a practical range of resources. These results demonstrate how an HPC-driven approach can push digital twins beyond their current limitations, making them smarter, faster, and more capable of handling real-world complexity.
This work has been supported by the HP2C-DT TED2021-130351BC22, HP2C-DT TED2021-130351B-C21 and PID2023-147979NB-C21 projects, funded by the MCIN/AEI/10.13039/501100011033 and by the European Union NextGenerationEU/ PRTR, and by the Departament de Recerca i Universitats de la Generalitat de Catalunya, research group MPiEDist (2021 SGR 00412). Furthermore, Eduardo Iraola acknowledges his AI4S fellowship within the “Generación D” initiative by Red.es, Ministerio para la Transformación Digital y de la Función Pública, for talent attraction (C005/24-ED CV1), funded by NextGenerationEU through PRTR. The work of Eduardo Prieto-Araujo was supported by the Agència de Gestió d’Ajuts Universitaris i de Recerca (AGAUR) through the ICREA Acadèmia programme, and by the Departament de Recerca i Universitats of the Generalitat de Catalunya.
Peer Reviewed
Postprint (author's final draft)
Article
English
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors; Àrees temàtiques de la UPC::Informàtica::Intel·ligència artificial; Computing continuum; Digital twin; HPC; Industry 4.0; Cyber-physical systems; Edge computing; Cloud computing; IoT; Artificial intelligence; Power systems
Elsevier
https://www.sciencedirect.com/science/article/abs/pii/S0167739X25006272
info:eu-repo/grantAgreement/AEI/PLAN ESTATAL DE INVESTIGACIÓN CIENTÍFICA Y TÉCNICA Y DE INNOVACIÓN 2021-2023/TED2021-130351B-C21/Gemelo digital de alta precisión habilitado por computador de altas prestaciones para aplicaciones de sistema eléctrico modernas
info:eu-repo/grantAgreement/AEI//TED2021-130351B-C22
http://creativecommons.org/licenses/by-nc-nd/4.0/
Open Access
Attribution-NonCommercial-NoDerivatives 4.0 International
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