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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. TIEG-P - Terrassa Industrial Electronics Group -Power |
dc.contributor.author | Picas Prat, Ricard |
dc.contributor.author | Pou, Josep |
dc.contributor.author | Zaragoza Bertomeu, Jordi |
dc.contributor.author | Watson, Alan |
dc.contributor.author | Konstantinou, Georgios |
dc.contributor.author | Ceballos Recio, Salvador |
dc.contributor.author | Clare, John |
dc.date | 2016 |
dc.identifier.citation | Picas, R., Pou, J., Zaragoza, J., Watson, A., Konstantinou, G., Ceballos, S., Clare, J. Submodule power losses balancing algorithms for the modular multilevel converter. A: Annual Conference of the IEEE Industrial Electronics Society. "Proceedings of the IECON2016: 42nd annual conference of the Industrial Electronics Society: Florence (Italy), October 24-27, 2016". Florence: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 5064-5069. |
dc.identifier.citation | 978-1-5090-3474-1 |
dc.identifier.citation | 10.1109/IECON.2016.7793381 |
dc.identifier.uri | http://hdl.handle.net/2117/102270 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència |
dc.subject | Electric current converters |
dc.subject | Switching circuits |
dc.subject | Power electronics |
dc.subject | Modular multilevel converter |
dc.subject | power losses |
dc.subject | capacitor voltage ripples |
dc.subject | reliability improvement. |
dc.subject | Convertidors de corrent elèctric |
dc.subject | Circuits de commutació |
dc.subject | Electrònica de potència |
dc.title | Submodule power losses balancing algorithms for the modular multilevel converter |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
dc.description.abstract |