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Title:
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Submodule power losses balancing algorithms for the modular multilevel converter
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Author:
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Picas Prat, Ricard; Pou, Josep; Zaragoza Bertomeu, Jordi; Watson, Alan; Konstantinou, Georgios; Ceballos Recio, Salvador; Clare, John
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. TIEG-P - Terrassa Industrial Electronics Group -Power |
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Abstract:
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Tolerance and component aging can cause significant differences in the capacitance values of the submodules (SMs) in a modular multilevel converter (MMC). Depending on the modulation technique, capacitance mismatches may produce uneven switching transitions of the SMs, hence imbalances in the power losses that can lead to reliability problems. In this paper, a new algorithm that helps to achieve evenly distributed switching and conduction losses within the converter SMs is presented. The proposed algorithm is based on a modification of the common voltage balancing algorithms, balancing a weighted function of voltage and losses. Even distribution of power losses is achieved at the cost of slightly increasing the capacitor voltage ripples. The effectiveness of the strategy has been demonstrated by simulation results of a high-power grid-connected MMC. |
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Abstract:
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Peer Reviewed |
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Subject(s):
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-Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència
-Electric current converters
-Switching circuits
-Power electronics
-Modular multilevel converter
-power losses
-capacitor voltage ripples
-reliability improvement.
-Convertidors de corrent elèctric
-Circuits de commutació
-Electrònica de potència |
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Rights:
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Document type:
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Article - Submitted version
Conference Object |
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Published by:
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Institute of Electrical and Electronics Engineers (IEEE)
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