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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
dc.contributor.author | Di Carlo, Stefano |
dc.contributor.author | Indaco, Marco |
dc.contributor.author | Prinetto, Paolo |
dc.contributor.author | Vatajelu, Elena Ioana |
dc.contributor.author | Rodríguez Montañés, Rosa |
dc.contributor.author | Figueras Pàmies, Joan |
dc.date | 2014 |
dc.identifier.citation | Stefano Di Carlo [et al.]. Reliability estimation at block-level granularity of spin-transfer-torque MRAMs. A: DFT - IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems. "DFT2014 - 27th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems". Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 75-80. |
dc.identifier.citation | 978-1-4799-6155-9 |
dc.identifier.citation | 10.1109/DFT.2014.6962093 |
dc.identifier.uri | http://hdl.handle.net/2117/27040 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Sistemes d'informació |
dc.subject | Computer storage devices -- Reliability |
dc.subject | Emerging memories |
dc.subject | STT-MRAM |
dc.subject | Memory reliability |
dc.subject | Ordinadors -- Dispositius de memòria -- Fiabilitat |
dc.title | Reliability estimation at block-level granularity of spin-transfer-torque MRAMs |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract |