To access the full text documents, please follow this link: http://hdl.handle.net/2117/169728

Title:	Techniques to reduce the power consumption of a CMOS digital PLL for wireless systems
Author:	Martí Pascual, David
Other authors:	Politecnico di Milano; Levantino, Salvatore
Abstract:	Outgoing
Subject(s):	-Àrees temàtiques de la UPC::Enginyeria de la telecomunicació -Telecommunication -Telecomunicació
Rights:
Document type:	Research/Master Thesis
Published by:	Universitat Politècnica de Catalunya
Share:

Show full item record