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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Armejach Sanosa, Adrià |
dc.contributor.author | Caminal Pallarés, Helena |
dc.contributor.author | Cebrián González, Juan Manuel |
dc.contributor.author | González-Alberquilla, Rekai |
dc.contributor.author | Adeniyi-Jones, Chris |
dc.contributor.author | Valero Cortés, Mateo |
dc.contributor.author | Casas, Marc |
dc.contributor.author | Moreto Planas, Miquel |
dc.date | 2018 |
dc.identifier.citation | Armejach, A., Caminal, H., Cebrián, J.M., González-Alberquilla, R., Adeniyi-Jones, C., Valero, M., Casas, M., Moreto, M. Stencil codes on a vector length agnostic architecture. A: International Conference on Parallel Architectures and Compilation Techniques. "Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques: Limassol, Cyprus, November 01-04, 2018". New York: Association for Computing Machinery (ACM), 2018, p. 1-12. |
dc.identifier.citation | 978-1-4503-5986-3 |
dc.identifier.citation | 10.1145/3243176.3243192 |
dc.identifier.uri | http://hdl.handle.net/2117/125368 |
dc.language.iso | eng |
dc.publisher | Association for Computing Machinery (ACM) |
dc.relation | https://dl.acm.org/citation.cfm?id=3243192 |
dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2015-65316-P |
dc.relation | info:eu-repo/grantAgreement/AEI/RYC-2016-21104 |
dc.relation | info:eu-repo/grantAgreement/AGAUR/2017 SGR 1414 |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/671697 |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/779877 |
dc.relation | info:eu-repo/grantAgreement/ES/PE2013-2016/TIN2015-65316-P |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles |
dc.subject | Parallel processing (Electronic computers) |
dc.subject | Single instruction |
dc.subject | Multiple data |
dc.subject | Parallel computing models |
dc.subject | Data-level parallelism |
dc.subject | Scalable vector extension |
dc.subject | Vector length agnostic |
dc.subject | Stencil computations |
dc.subject | Processament en paral·lel (Ordinadors) |
dc.title | Stencil codes on a vector length agnostic architecture |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
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