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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Barrera, I.S. |
dc.contributor.author | Ayguadé Parra, Eduard |
dc.contributor.author | Valero Cortés, Mateo |
dc.contributor.author | Moreto Planas, Miquel |
dc.contributor.author | Labarta Mancho, Jesús José |
dc.contributor.author | Casas Guix, Marc |
dc.date | 2018 |
dc.identifier.citation | Barrera, I., Ayguade, E., Valero, M., Moreto, M., Labarta, J., Casas, M. Reducing data movement on large shared memory systems by exploiting computation dependencies. A: International Conference on Supercomputing. "ICS'18: 2018 International Conference on Supercomputing: Beijing, China: June 12-15, 2018". New York: Association for Computing Machinery (ACM), 2018, p. 207-217. |
dc.identifier.citation | 978-1-4503-5783-8 |
dc.identifier.citation | 10.1145/3205289.3205310 |
dc.identifier.uri | http://hdl.handle.net/2117/125137 |
dc.language.iso | eng |
dc.publisher | Association for Computing Machinery (ACM) |
dc.relation | https://dl.acm.org/citation.cfm?id=3205310 |
dc.relation | info:eu-repo/grantAgreement/ES/1PE/TIN2015-65316-P |
dc.relation | info:eu-repo/grantAgreement/AGAUR/PRI2010-2013/2014 SGR 1051 |
dc.relation | info:eu-repo/grantAgreement/AGAUR/PRI2010-2013/2014 SGR 1272 |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/779877/EU/Mont-Blanc 2020, European scalable, modular and power efficient HPC processor/Mont-Blanc 2020 |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/671697/EU/Mont-Blanc 3, European scalable and power efficient HPC platform based on low-power embedded technology/Mont-Blanc 3 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Sistemes d'informació::Emmagatzematge i recuperació de la informació |
dc.subject | Parallel programming (Computer science) |
dc.subject | NUMA |
dc.subject | Scheduling |
dc.subject | Shared memory |
dc.subject | Task-based programming model Data transfer |
dc.subject | Graph theory |
dc.subject | Intelligent control |
dc.subject | Memory architecture |
dc.subject | Scheduling |
dc.subject | Virtual storage |
dc.subject | Graph Partitioning |
dc.subject | Non uniform memory access |
dc.subject | NUMA |
dc.subject | Parallel application |
dc.subject | Performance improvements |
dc.subject | Shared memory |
dc.subject | Shared memory system |
dc.subject | Task-based programming |
dc.subject | Data reduction |
dc.subject | Programació en paral·lel (Informàtica) |
dc.title | Reducing data movement on large shared memory systems by exploiting computation dependencies |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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