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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | González García, Rubén |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.author | Ortega Fernández, Daniel |
dc.contributor.author | Veidenbaum, Alex |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2004 |
dc.identifier.citation | González, R., Cristal, A., Ortega, D., Veidenbaum, A., Valero, M. A content aware integer register file organization. A: International Symposium on Computer Architecture. "31st Annual International Symposium on Computer Architecture, 2004: proceedings". Munich: Institute of Electrical and Electronics Engineers (IEEE), 2004, p. 314-324. |
dc.identifier.citation | 0-7695-2143-6 |
dc.identifier.citation | 10.1109/ISCA.2004.1310784 |
dc.identifier.uri | http://hdl.handle.net/2117/113048 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/document/1310784/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Microprocessors -- Energy consumption |
dc.subject | Parallel processing (Electronic computers) |
dc.subject | Power consumption |
dc.subject | Parallel architectures |
dc.subject | Instruction sets |
dc.subject | Microprocessor chips |
dc.subject | File organisation |
dc.subject | Microprocessadors -- Consum d'energia |
dc.subject | Processament en paral·lel (Ordinadors) |
dc.title | A content aware integer register file organization |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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