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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor.author | Abella Ferrer, Jaume |
dc.contributor.author | González Colás, Antonio María |
dc.date | 2006 |
dc.identifier.citation | Abella, J., González, A. SAMIE-LSQ: set-associative multiple-instruction entry load/store queue. A: IEEE International Parallel and Distributed Processing Symposium. "Proceeding of the 20th IEEE International Parallel & Distributed Processing Symposium". Ixia, Rodes: IEEE Computer Society, 2006, p. 1-10. |
dc.identifier.citation | 1-42440054-6 |
dc.identifier.citation | 10.1109/IPDPS.2006.1639290 |
dc.identifier.uri | http://hdl.handle.net/2117/101144 |
dc.language.iso | eng |
dc.publisher | IEEE Computer Society |
dc.relation | http://ieeexplore.ieee.org/document/1639290/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Cache memory |
dc.subject | Microprocessors |
dc.subject | Delay |
dc.subject | Power dissipation |
dc.subject | Cooling |
dc.subject | Pipelines |
dc.subject | Computer architecture |
dc.subject | Concrete |
dc.subject | Costs |
dc.subject | Memòria ràpida de treball (Informàtica) |
dc.subject | Microprocessadors |
dc.title | SAMIE-LSQ: set-associative multiple-instruction entry load/store queue |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
dc.description.abstract |