A systolic algorithm for the fast computation of the connected components of a graph

Other authors

Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors

Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions

Publication date

1988

Abstract

The authors consider the description of a systolic algorithm to solve the connected-component problem. It is executed in a ring topology with N processors, requiring O(Nlog N) time without regard to the graph's sparsity. The algorithm-partitioning issue is also addressed, indicating how to optimally map the computations into fixed-size rings or linear arrays. The proposed algorithm leads to simple processing elements, data addressing, and control. These points make the systolic array highly implementable.


Peer Reviewed


Postprint (published version)

Document Type

Conference report

Language

English

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Related items

http://ieeexplore.ieee.org/document/15396/

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Rights

Open Access

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E-prints [73034]