Capacitive Metal-Insulator-Semiconductor structures with graphene as interfacial layer between the HfO dielectric and the top electrode have been fabricated and investigated at device level and at the nanoscale with Conductive Atomic Force Microscope. In particular, their electrical properties and variability have been compared to devices without graphene to evaluate their feasibility as ReRAM devices. At device level, we observe that, when graphene is present as an intercalated layer, several resistive switching cycles can be measured, meanwhile the standard structures without graphene do not show resistive switching behavior. Nanoscale analysis showed that the graphene layer prevents the microstructural irreversible damage of the oxide material during a forming process. Therefore, graphene somehow protects the structure during the CF formation. This protection would explain the observation of RS of the devices with intercalated graphene.