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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits |
dc.contributor.author | Aghazadeh, Seyed Rasoul |
dc.contributor.author | Martínez García, Herminio |
dc.contributor.author | Saberkari, Alireza |
dc.contributor.author | Alarcón Cot, Eduardo José |
dc.date | 2018 |
dc.identifier.citation | Aghazadeh, S. [et al.]. Tunable wide–band second–order all–pass filter–based time delay cell using active inductor. A: Conference on Design of Circuits and Integrated Systems. "32nd Conference on Design of Circuits and Integrated Systems, DCIS 2017: proceedings, November 22nd-24th 2017, Barcelona". Institute of Electrical and Electronics Engineers (IEEE), 2018, p. 1-5. |
dc.identifier.citation | 978-1-5386-5108-7 |
dc.identifier.uri | http://hdl.handle.net/2117/131025 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject | Microelectronics |
dc.subject | Microelectrònica |
dc.title | Tunable wide–band second–order all–pass filter–based time delay cell using active inductor |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |