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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. ARCO - Microarquitectura i Compiladors |
dc.contributor | Universitat Politècnica de Catalunya. VIRTUOS - Virtualisation and Operating Systems |
dc.contributor.author | Vallero, Alessandro |
dc.contributor.author | Savino, Alessandro |
dc.contributor.author | Chatzidimitriou, Athanansios |
dc.contributor.author | Kaliorakis, Manolis |
dc.contributor.author | Kooli, Maha |
dc.contributor.author | Riera Villanueva, Marc |
dc.contributor.author | Di Natale, Giorgio |
dc.contributor.author | Bosio, Alberto |
dc.contributor.author | Canal Corretger, Ramon |
dc.contributor.author | Gizopoulos, Dimitris |
dc.contributor.author | Di Carlo, Stefano |
dc.contributor.author | Anglada Sanchez , Martí |
dc.contributor.author | González Colás, Antonio María |
dc.contributor.author | Mariani, R. |
dc.date | 2018-01-01 |
dc.identifier.citation | Vallero, A., Savino, A., Chatzidimitriou, A., Kaliorakis, M., Kooli, M., Riera, M., Di Natale, G., Anglada, M., Bosio, A., Canal, R., González, A., Gizopoulos, D., Mariani, R., Di Carlo, S. SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems. "IEEE transactions on computers", 1 Gener 2018, vol. 68, núm. 5, p. 765-783. |
dc.identifier.citation | 0018-9340 |
dc.identifier.citation | 10.1109/TC.2018.2887225 |
dc.identifier.uri | http://hdl.handle.net/2117/126429 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | https://ieeexplore.ieee.org/document/8580414 |
dc.relation | info:eu-repo/grantAgreement/EC/FP7/611404/EU/Cross-Layer Early Reliability Evaluation for the Computing cOntinuum/CLERECO |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica |
dc.subject | Microprocessors |
dc.subject | Reliability |
dc.subject | Cross-layer |
dc.subject | Microprocessors |
dc.subject | Soft errors |
dc.subject | Failures-in-Time |
dc.subject | Microprocessadors |
dc.title | SyRA: early system reliability analysis for cross-layer soft errors resilience in memory arrays of microprocessor systems |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/article |
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