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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Yalcin, Gulay |
dc.contributor.author | Unsal, Osman Sabri |
dc.contributor.author | Hur, Ibrahim |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2010 |
dc.identifier.citation | Yalcin, G., Unsal, O., Hur, I., Cristal, A., Valero, M. FaulTM: Fault-tolerance using hardware transactional memory. A: Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture. "PESPMA 2010: Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture: June 2010, Saint Malo, France.". Saint Malo: 2010, p. 34-43. |
dc.identifier.uri | http://hdl.handle.net/2117/109232 |
dc.language.iso | eng |
dc.relation | info:eu-repo/grantAgreement/EC/FP7/216852/EU/VELOX: An Integrated Approach to Transactional Memory on Multi- and Many-core Computers/VELOX |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Fault-tolerant computing |
dc.subject | Fault-tolerance |
dc.subject | Transactional Memory (TM) |
dc.subject | Hardware Transactional Memory (HTM) |
dc.subject | FaulTM |
dc.subject | Tolerància als errors (Informàtica) |
dc.title | FaulTM: Fault-tolerance using hardware transactional memory |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
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