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dc.contributor.author | Cruz, Eduardo H.M. |
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dc.contributor.author | Diener, Matthias |
dc.contributor.author | Pilla, Laércio L. |
dc.contributor.author | Navaux, Philippe O.A. |
dc.date | 2016-09-06 |
dc.identifier.citation | Cruz, E. H. [et al.]. Hardware-Assisted Thread and Data Mapping in Hierarchical Multicore Architectures. "ACM Transactions on Architecture and Code Optimization (TACO)", 6 Setembre 2016, vol. 13, núm. 3. |
dc.identifier.citation | 1544-3566 |
dc.identifier.citation | 10.1145/2975587 |
dc.identifier.uri | http://hdl.handle.net/2117/113312 |
dc.language.iso | eng |
dc.publisher | Association for Computing Machinery (ACM) |
dc.relation | https://dl.acm.org/citation.cfm?id=2975587 |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/689772/EU/HPC for Energy/HPC4E |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Informàtica |
dc.subject | High performance computing |
dc.subject | Data Mapping |
dc.subject | Supercomputadors |
dc.title | Hardware-Assisted Thread and Data Mapping in Hierarchical Multicore Architectures |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/article |
dc.description.abstract | |
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