Analyzing stability concerns in the presence of variations in Subthreshold SRAM

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dc.contributor	Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor	Canal Corretger, Ramon
dc.contributor.author	Rana, Manish
dc.date	2012-07-02
dc.identifier.citation	84693
dc.identifier.uri	http://hdl.handle.net/2099.1/20728
dc.language.iso	eng
dc.publisher	Universitat Politècnica de Catalunya
dc.rights	info:eu-repo/semantics/openAccess
dc.subject	Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats
dc.subject	Integrated circuits
dc.subject	Subliminals
dc.subject	inversió feble
dc.subject	SRAM Bit de cèl · lules
dc.subject	marge de soroll estàtic
dc.subject	N-corba
dc.subject	variacions del procés
dc.subject	Subthreshold
dc.subject	Weak Inversion
dc.subject	SRAM Bit-cell
dc.subject	Static Noise Margin
dc.subject	N-curve
dc.subject	Process Variations
dc.subject	Circuits integrats
dc.title	Analyzing stability concerns in the presence of variations in Subthreshold SRAM
dc.type	info:eu-repo/semantics/masterThesis
dc.description.abstract	In this work, we analyse the stability of the SRAM bitcells when operating in subthreshold supply voltages.We propose a new bit cell with higher stability than 6T Bitcell,that is able to discharge the bit lines in 41% less time than the 6T as it's discharge path is only of single transistor.

Rana, Manish; Canal Corretger, Ramon

Rana, Manish; Canal Corretger, Ramon; Amat Bertran, Esteve; Rubio Sola, Jose Antonio

Rana, Manish; Canal Corretger, Ramon

Rana, Manish; Canal Corretger, Ramon; Amat Bertran, Esteve; Rubio Sola, Jose Antonio

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