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dc.contributor | Universitat Oberta de Catalunya (UOC) |
---|---|
dc.contributor.author | Bañeres Besora, David |
dc.contributor.author | Clarisó Viladrosa, Robert |
dc.contributor.author | Jorba i Esteve, Josep |
dc.contributor.author | Serra Vizern, Montse |
dc.date | 2019-03-26T12:11:24Z |
dc.date | 2019-03-26T12:11:24Z |
dc.date | 2014-10 |
dc.identifier.citation | Baneres, D., Clarisó, R., Jorba, J. & Serra, M. (2014). Experiences in digital circuit design courses: a self-study platform for learning support. IEEE Transactions on Learning Technologies, 7(4), 360-374. doi: 10.1109/TLT.2014.2320919 |
dc.identifier.citation | 1939-1382 |
dc.identifier.citation | 10.1109/tlt.2014.2320919 |
dc.identifier.uri | http://hdl.handle.net/10609/92575 |
dc.format | application/pdf |
dc.language.iso | eng |
dc.publisher | IEEE Transactions on Learning Technologies |
dc.relation | IEEE Transactions on Learning Technologies, 2014, 7(4) |
dc.relation | https://doi.org/10.1109/tlt.2014.2320919 |
dc.rights | (c) Author/s & (c) Journal |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | digital circuit design |
dc.subject | automatic assessment |
dc.subject | e-learning |
dc.subject | formal verification |
dc.subject | model checking |
dc.subject | diseño de circuito digital |
dc.subject | evaluación automática |
dc.subject | e-learning |
dc.subject | verificación formal |
dc.subject | control de modelo |
dc.subject | disseny de circuits digitals |
dc.subject | avaluació automàtica |
dc.subject | aprenentatge virtual |
dc.subject | verificació formal |
dc.subject | comprovació de models |
dc.subject | Web-based instruction |
dc.subject | Ensenyament virtual |
dc.subject | Enseñanza virtual |
dc.title | Experiences in digital circuit design courses: a self-study platform for learning support |
dc.type | info:eu-repo/semantics/article |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.description.abstract |