Other authors

Crespo Yepes, Albert,

Publication date

2021



Abstract

The project focuses on the study of transistors with FD-SOI technology to provide and corroborate information on their degradation when applying Bia Temperature Instability (BTI) and Channel Hot Carriers (HCC). Applying the constant voltage stress technique to the devices, observing how their behaviour evolves during their useful life, in addition to focusing the study on random telegraph noise (RTN). The results of the fresh and stressed characterization of the devices are compared to know how the transistors vary after different stress tensions from the characteristic IG-VG, ID-VG and ID-VD. From the method of time lag plot (W-TLP) it is possible to identify the relevant levels of RTN in which the devices work in fresh and stressed state. The conclusion is that the effects of degradation in this technology affect their operation and provide an increase in the RTN in the devices.

Document Type

Treball de fi de postgrau

Language

English

Publisher

 

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Rights

open access

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