© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

This paper presents the curvature characterization results of released back-end-of-line 5 µm-wide cantilevers for two different 0.18-µm 1P6M complementary metal-oxide semiconductor microelectromechanical systems processes. Results from different runs and lots from each foundry are presented. The methodology and accuracy of the characterization approach, based on optical measurements of test cantilever curvature, are also discussed. Special emphasis is given to the curvature average and variability as a function of the number of stacked layers. Analythical equations for modeling the bending behavior of stacked cantilevers as a function of the tungsten (W) vias that join the metal layers are presented. In addition, the effect of various post-processing conditions and design techniques on the curvature of both single and stacked cantilevers is analyzed. In particular, surpassing certain time-dependent temperature stress conditions after release lead to curvature shifts larger than one order of magnitude. Also, the W via design was found to strongly affect the curvature of the test cantilevers.

Peer Reviewed