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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Torres Viñals, Jordi |
dc.contributor.author | Ayguadé Parra, Eduard |
dc.contributor.author | Labarta Mancho, Jesús José |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 1996 |
dc.identifier.citation | Torres, J., Ayguadé, E., Labarta, J., Valero, M. Loop parallelization: revisiting framework of unimodular transformations. A: Euromicro International Conference on Parallel, Distributed, and Network-Based Processing. "Proceedings of the Fourth Euromicro Workshop on Parallel and Distributed Processing, 1996: PDP '96". Braga: Institute of Electrical and Electronics Engineers (IEEE), 1996, p. 420-427. |
dc.identifier.citation | 0-8186-7376-1 |
dc.identifier.citation | 10.1109/EMPDP.1996.500615 |
dc.identifier.uri | http://hdl.handle.net/2117/112468 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/document/500615/ |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Parallel algorithms |
dc.subject | Parallel programming (Computer science) |
dc.subject | Graph theory |
dc.subject | Optimising compilers |
dc.subject | Algorismes paral·lels |
dc.subject | Programació en paral·lel (Informàtica) |
dc.subject | Grafs, Teoria de |
dc.title | Loop parallelization: revisiting framework of unimodular transformations |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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