To access the full text documents, please follow this link: http://hdl.handle.net/2117/108741
dc.contributor | Barcelona Supercomputing Center |
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dc.contributor.author | Rigo, Alvise |
dc.contributor.author | Pinto, Christian |
dc.contributor.author | Pouget, Kevin |
dc.contributor.author | Raho, Daniel |
dc.contributor.author | Dutoit, Denis |
dc.contributor.author | Martinez, Pierre-Yves |
dc.contributor.author | Doran, Chris |
dc.contributor.author | Benini, Luca |
dc.contributor.author | Mavroidis, Iakovos |
dc.contributor.author | Marazakis, Manolis |
dc.contributor.author | Bartsch, Valeria |
dc.contributor.author | Lonsdale, Guy |
dc.contributor.author | Pop, Antoniu |
dc.contributor.author | Goodacre, John |
dc.contributor.author | Colliot, Annaïk |
dc.contributor.author | Carpenter, Paul |
dc.contributor.author | Radojkovic, Petar |
dc.contributor.author | Pleiter, Dirk |
dc.contributor.author | Drouin, Dominique |
dc.contributor.author | Dupont de Dinechin, Benoît |
dc.date | 2017-09-28 |
dc.identifier.citation | Rigo, A. [et al.]. Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach. A: "Digital System Design (DSD), 2017 Euromicro Conference on". IEEE, 2017, p. 486-493. |
dc.identifier.citation | 978-1-5386-2146-2 |
dc.identifier.citation | 10.1109/DSD.2017.37 |
dc.identifier.uri | http://hdl.handle.net/2117/108741 |
dc.language.iso | eng |
dc.publisher | IEEE |
dc.relation | http://ieeexplore.ieee.org/document/8049829/ |
dc.relation | info:eu-repo/grantAgreement/EC/H2020/671578/EU/European Exascale Processor Memory Node Design/ExaNoDe |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject | High performance computing |
dc.subject | Computer architecture |
dc.subject | Power demand |
dc.subject | Supercomputers |
dc.subject | Silicon |
dc.subject | Hardware |
dc.subject | Program processors |
dc.subject | Computational modeling |
dc.subject | Computer architecture |
dc.subject | Exascale |
dc.subject | HPC |
dc.subject | Unimem |
dc.subject | Silicon interposer |
dc.subject | Virtualization |
dc.subject | Supercomputadors |
dc.subject | Programari--Disseny |
dc.title | Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach |
dc.type | info:eu-repo/semantics/submittedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
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