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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
dc.contributor.author | Arumi Delgado, Daniel |
dc.contributor.author | Rodríguez Montañés, Rosa |
dc.contributor.author | Manich Bou, Salvador |
dc.contributor.author | Pehl, Michael |
dc.date | 2016 |
dc.identifier.citation | Arumi, D., Rodriguez-Montanes, R., Manich, S., Pehl, M. RRAM Based Random Bit Generation for Hardware Security Applications. A: Conference on Design of Circuits and Integrated Systems. "Proceedings: 2016 Conference on Design of Circuits and Integrated Systems: DCIS 2016: November 23rd-25th 2016, Granada, Spain". Granada: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 1-6. |
dc.identifier.citation | 978-1-5090-4565-5 |
dc.identifier.citation | 10.1109/DCIS.2016.7845382 |
dc.identifier.uri | http://hdl.handle.net/2117/108121 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica |
dc.subject | Integrated circuits |
dc.subject | Stochastic systems |
dc.subject | memory array |
dc.subject | RRAM |
dc.subject | PUF |
dc.subject | security |
dc.subject | stochastic switching |
dc.subject | hardware security |
dc.subject | variability |
dc.subject | Circuits integrats |
dc.subject | Sistemes estocàstics |
dc.title | RRAM Based Random Bit Generation for Hardware Security Applications |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
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