Títol:
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Evaluating the effect of last-level cache sharing on integrated GPU-CPU systems with heterogeneous applications
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Autor/a:
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García Flores, Víctor; Gomez Luna, J.; Grass, Thomas Dieter; Rico, Alejandro; Ayguadé Parra, Eduard; Pena, A. J.
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Altres autors:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
Abstract:
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Heterogeneous systems are ubiquitous in the field of High- Performance Computing (HPC). Graphics processing units (GPUs) are widely used as accelerators for their enormous computing potential and energy efficiency; furthermore, on-die integration of GPUs and general-purpose cores (CPUs) enables unified virtual address spaces
and seamless sharing of data structures, improving programmability and softening the entry barrier for heterogeneous programming. Although on-die GPU integration seems to be the trend among the major microprocessor manufacturers, there are still many open questions regarding the architectural design of these systems. This paper is a step forward towards understanding the effect of on-chip resource sharing between GPU and CPU cores, and in particular, of
the impact of last-level cache (LLC) sharing in heterogeneous computations. To this end, we analyze the behavior of a variety of heterogeneous GPU-CPU benchmarks on different cache configurations. We perform an evaluation of the popular Rodinia benchmark suite modified to leverage the unified memory address space. We find such GPGPU workloads to be mostly insensitive to changes in the cache hierarchy due to the limited interaction and data sharing between GPU and CPU. We then evaluate a set of heterogeneous benchmarks specifically designed to take advantage of the finegrained data sharing and low-overhead synchronization between GPU and CPU cores that these integrated architectures enable. We show how these algorithms are more sensitive to the design of the cache hierarchy, and find that when GPU and CPU share the LLC execution times are reduced by 25% on average, and energy-to-solution by over 20% for all benchmarks. |
Abstract:
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This work has been supported by the Spanish Ministry of Science and Innovation (contract TIN2015-65316-P) and by the BSC/UPC NVIDIA GPU Center of Excellence. |
Abstract:
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Peer Reviewed |
Matèries:
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-Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors -Microprocessors -Computer architecture -Cache storage -Graphics processing units -Microprocessor chips -Last-level cache sharing -Integrated GPU-CPU system -Heterogeneous system -Highperformance computing -HPC -Graphics processing unit -Energy efficiency -Virtual address space -On-die GPU integration -On-chip resource sharing -Rodinia benchmark -Unified memory address space -GPGPU -Microprocessadors -Arquitectura d'ordinadors |
Drets:
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Tipus de document:
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Article - Versió publicada Objecte de conferència |
Publicat per:
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Institute of Electrical and Electronics Engineers (IEEE)
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