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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Smiljkovic, Vesna |
dc.contributor.author | Stipic, Srdjan |
dc.contributor.author | Fetzer, Christof |
dc.contributor.author | Unsal, Osman Sabri |
dc.contributor.author | Cristal Kestelman, Adrián |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2014 |
dc.identifier.citation | Smiljkovic, V. [et al.]. DeTrans: Deterministic and parallel execution of transactions. A: International Symposium on Computer Architecture and High Performance Computing. "IEEE 26th International Symposium on Computer Architecture and High Performance Computing: 22–24 October 2014: Paris, France: proceedings". París: Institute of Electrical and Electronics Engineers (IEEE), 2014, p. 152-159. |
dc.identifier.citation | 978-1-4799-6904-3 |
dc.identifier.citation | 10.1109/SBAC-PAD.2014.20 |
dc.identifier.uri | http://hdl.handle.net/2117/28240 |
dc.language.iso | eng |
dc.publisher | Institute of Electrical and Electronics Engineers (IEEE) |
dc.relation | http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6970659 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Parallel programming (Computer science) |
dc.subject | Operating systems (Computers) |
dc.subject | Simultaneous multithreading processors |
dc.subject | Determinism |
dc.subject | Multithreading |
dc.subject | Transactional memory |
dc.subject | Programació en paral·lel (Informàtica) |
dc.subject | Sistemes operatius (Ordinadors) |
dc.title | DeTrans: Deterministic and parallel execution of transactions |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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