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Title:
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AMMC: advance multi-core memory controller
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Author:
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Hussain, Tassadaq; Palomar Pérez, Óscar; Unsal, Osman Sabri; Cristal Kestelman, Adrián; Ayguadé Parra, Eduard; Valero Cortés, Mateo
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Other authors:
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Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors; Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
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Abstract:
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In this work, we propose an efficient scheduler and intelligent memory manager known as AMMC (Advanced Multi-Core Memory Controller), which proficiently handles data movement and computational tasks. The proposed AMMC system improves performance by managing complex data transfers at run-time and scheduling multi-cores without the intervention of a control processor nor an operating system. AMMC has been coupled with a heterogeneous system that provides both general-purpose cores and application specific accelerators. The AMMC system is implemented and tested on a Xilinx ML505 evaluation FPGA board. The performance of the system is compared with a microprocessor based system that has been integrated with the Xilkernel operating system. Results show that the AMMC based multi-core system consumes 48% less hardware resources, 27.9% less on-chip power and achieves 6.8x of speed-up compared to the MicroBlaze-based multi-core system. |
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Abstract:
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Peer Reviewed |
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Subject(s):
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-Àrees temàtiques de la UPC::Informàtica::Sistemes d'informació::Emmagatzematge i recuperació de la informació
-Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica
-Memory management (Computer science)
-Field programmable gate arrays
-Field programmable gate arrays
-Microprocessor chips
-Multiprocessing systems
-Operating system kernels
-Scheduling
-Gestió de memòria (Informàtica)
-Matrius de portes programables per l'usuari |
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Rights:
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Document type:
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Article - Submitted version
Conference Object |
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Published by:
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Institute of Electrical and Electronics Engineers (IEEE)
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