The TERAFLUX Project: Exploiting the dataflow paradigm in next generation teradevices

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To access the full text documents, please follow this link: http://hdl.handle.net/2117/27302

dc.contributor	Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor	Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.contributor.author	Solinas, Marco
dc.contributor.author	Badia Sala, Rosa Maria
dc.contributor.author	Bodin, François
dc.contributor.author	Cohen, Albert
dc.contributor.author	Evripidou, Paraskevas
dc.contributor.author	Faraboschi, Paolo
dc.contributor.author	Fechner, Bernhard
dc.contributor.author	Gao, Guang R.
dc.contributor.author	Garbade, Arne
dc.contributor.author	Girbal, Sylvain
dc.contributor.author	Goodman, Daniel
dc.contributor.author	Khan, Behran
dc.contributor.author	Koliai, Souad
dc.contributor.author	Li, Feng
dc.contributor.author	Lujan, Mikel
dc.contributor.author	Morin, Laurent
dc.contributor.author	Mendelson, Avi
dc.contributor.author	Navarro, Nacho
dc.contributor.author	Pop, Antoniu
dc.contributor.author	Trancoso, Pedro
dc.contributor.author	Ungerer, Theo
dc.contributor.author	Valero Cortés, Mateo
dc.contributor.author	Weis, Sebastian
dc.contributor.author	Watson, Ian
dc.contributor.author	Zuckermann, Stéphane
dc.contributor.author	Giorgi, Roberto
dc.date	2013
dc.identifier.citation	Solinas, M. [et al.]. The TERAFLUX Project: Exploiting the dataflow paradigm in next generation teradevices. A: Euromicro Symposium on Digital Systems Design. "16th Euromicro Conference on Digital System Design, DSD 2013: 4-6 September 2013, Santander, Spain: proceedings". Santander: IEEE Computational Intelligence Society, 2013, p. 272-279.
dc.identifier.citation	978-0-7695-5074-9
dc.identifier.citation	10.1109/DSD.2013.39
dc.identifier.uri	http://hdl.handle.net/2117/27302
dc.language.iso	eng
dc.publisher	IEEE Computational Intelligence Society
dc.relation	http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6628287
dc.relation	info:eu-repo/grantAgreement/EC/FP7/249013/EU/Exploiting dataflow parallelism in Teradevice Computing/TERAFLUX
dc.rights	info:eu-repo/semantics/openAccess
dc.subject	Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject	High performance computing
dc.subject	TERAFLUX
dc.subject	Dataflow
dc.subject	Programming model
dc.subject	Compilation
dc.subject	Reliability
dc.subject	Architecture
dc.subject	Simulation
dc.subject	Many-cores
dc.subject	Exascale computing
dc.subject	Multi-cores
dc.subject	Càlcul intensiu (Informàtica)
dc.title	The TERAFLUX Project: Exploiting the dataflow paradigm in next generation teradevices
dc.type	info:eu-repo/semantics/publishedVersion
dc.type	info:eu-repo/semantics/conferenceObject
dc.description.abstract	Thanks to the improvements in semiconductor technologies, extreme-scale systems such as teradevices (i.e., composed by 1000 billion of transistors) will enable systems with 1000+ general purpose cores per chip, probably by 2020. Three major challenges have been identified: programmability, manageable architecture design, and reliability. TERAFLUX is a Future and Emerging Technology (FET) large-scale project funded by the European Union, which addresses such challenges at once by leveraging the dataflow principles. This paper describes the project and provides an overview of the research carried out by the TERAFLUX consortium.
dc.description.abstract	Peer Reviewed

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