Asynchronous pulse logic cell for threshold logic and Boolean networks

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Title:	Asynchronous pulse logic cell for threshold logic and Boolean networks
Author:	Lambie, J; Moll Echeto, Francisco de Borja; González Jiménez, José Luis; Rubio Sola, Jose Antonio
Other authors:	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions
Abstract:	In this article, a fully digital CMOS circuit for asynchronous pulse cells is presented. The proposed circuit has a high noise tolerance and no static power consumption. Furthermore it has a high functional programmability. The noise margins are given and the behaviour is demonstrated by different applications.
Abstract:	Peer Reviewed
Subject(s):	-Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats -Àrees temàtiques de la UPC::Energies::Gestió de l’energia::Estalvi energètic -Energy consumption -Integrated circuits -Boolean functions -CMOS logic circuits -Asynchronous circuits -Logic gates -Threshold logic -Energia -- Consum -Circuits integrats
Rights:	Attribution-NonCommercial-NoDerivs 3.0 Spain http://creativecommons.org/licenses/by-nc-nd/3.0/es/
Document type:	Article - Published version Conference Object
Published by:	Institute of Electrical and Electronics Engineers (IEEE)
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