To access the full text documents, please follow this link: http://hdl.handle.net/2117/22744

Title:	Design of an on–chip linear–assisted DC–DC voltage regulator
Author:	Cosp Vilella, Jordi; Martínez García, Herminio
Other authors:	Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica; Universitat Politècnica de Catalunya. AHA - Arquitectures Hardware Avançades; Universitat Politècnica de Catalunya. EPIC - Energy Processing and Integrated Circuits
Abstract:	This article shows the design of an on-chip CMOS linear-assisted DC-DC regulator. It results a good alternative topology to classic switching DC-DC power converters. In the presented technique, an auxiliary linear regulator is used to cancel the output voltage ripple and provides fast responses for load and line variations. On the other hand, a switching converter, connected in parallel, allows supplying almost the whole output current demanded by the load. The objective of this linear-assisted regulator or hybrid topology is to achieve a high efficiency of switching converters, with suitable load and line regulation features, typical of linear regulators. In this kind of on-chip applications, CMOS is the current prevailing technology. Thus, in order to implement on-chip power supply systems and on-chip power management systems with low to medium current consumption, this structure has good features.
Subject(s):	-Àrees temàtiques de la UPC::Enginyeria electrònica -On-chip CMOS linear-assisted DC-DC regulators. Switching DC-DC power converters. Voltage linear regulators. -Convertidors continu-continu -Metall-òxid-semiconductors complementaris
Rights:	Attribution-NonCommercial-NoDerivs 3.0 Spain http://creativecommons.org/licenses/by-nc-nd/3.0/es/
Document type:	Article - Published version Conference Object
Published by:	Institute of Electrical and Electronics Engineers (IEEE)
Share:

Show full item record