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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. QINE - Disseny de Baix Consum, Test, Verificació i Circuits Integrats de Seguretat |
dc.contributor.author | Carrasco, Juan A. |
dc.contributor.author | Suñé, Víctor |
dc.date | 2004-02 |
dc.identifier.citation | Carrasco, J.; Suñe, V. Combinatorial methods for the evaluation of yield and operational reliability of fault-tolerant systems-on-chip. "Microelectronics reliability", Febrer 2004, vol. 44, núm. 2, p. 339-350. |
dc.identifier.citation | 0026-2714 |
dc.identifier.uri | http://hdl.handle.net/2117/21071 |
dc.language.iso | eng |
dc.rights | Attribution-NonCommercial-NoDerivs 3.0 Spain |
dc.rights | info:eu-repo/semantics/openAccess |
dc.rights | http://creativecommons.org/licenses/by-nc-nd/3.0/es/ |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica::Circuits integrats |
dc.subject | Integrated circuits -- Very large scale integration -- Tests |
dc.subject | Circuits integrats a molt gran escala -- Tests |
dc.title | Combinatorial methods for the evaluation of yield and operational reliability of fault-tolerant systems-on-chip |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/article |
dc.description.abstract |