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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
dc.contributor.author | Rubio Sola, Jose Antonio |
dc.contributor.author | Amat Bertran, Esteve |
dc.contributor.author | Pouyan, Peyman |
dc.date | 2012 |
dc.identifier.citation | Rubio, J.A.; Amat, E.; Pouyan, P. Process variability-aware proactive reconfiguration techniques for mitigating aging effects in nano scale SRAM lifetime. A: VLSI Test Symposium. "Proceedings of the VLSI Test Symposium". Hawaii: IEEE Press. Institute of Electrical and Electronics Engineers, 2012, p. 240-245. |
dc.identifier.uri | http://hdl.handle.net/2117/16582 |
dc.language.iso | eng |
dc.publisher | IEEE Press. Institute of Electrical and Electronics Engineers |
dc.relation | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6231060 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics |
dc.subject | Electronic circuit design -- Fiabilitat |
dc.subject | Circuits electrònics -- Reliability |
dc.title | Process variability-aware proactive reconfiguration techniques for mitigating aging effects in nano scale SRAM lifetime |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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