Systematic design of two level pipelined systolic arrays with data contraflow

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dc.contributor	Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors
dc.contributor	Facultat d'Informàtica de Barcelona
dc.contributor	Universitat Politècnica de Catalunya. ICARUS - Intelligent Communications and Avionics for Robust Unmanned Aerial Systems
dc.contributor	Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions
dc.contributor.author	Valero García, Miguel
dc.contributor.author	Navarro Guerrero, Juan José
dc.contributor.author	Llaberia Griñó, José M.
dc.contributor.author	Valero Cortés, Mateo
dc.date	1988
dc.identifier.citation	Valero-García, M; Navarro, J.; Llaberia, J.; Valero, M. Systematic design of two level pipelined systolic arrays with data contraflow. A: IEEE International Symposium on Circuits and Systems. "1988 IEEE International Symposium on Circuits and Systems: proceedings". Institute of Electrical and Electronics Engineers (IEEE), 1988, p. 2521-2525.
dc.identifier.citation	951-721-239-9
dc.identifier.citation	10.1109/ISCAS.1988.15455
dc.identifier.uri	http://hdl.handle.net/2117/8885
dc.language.iso	eng
dc.relation	http://ieeexplore.ieee.org/document/15455/
dc.rights	info:eu-repo/semantics/openAccess
dc.subject	Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
dc.subject	Pipelining (Electronics)
dc.subject	Processadors de matrius (arrays)
dc.title	Systematic design of two level pipelined systolic arrays with data contraflow
dc.type	info:eu-repo/semantics/publishedVersion
dc.type	info:eu-repo/semantics/conferenceObject
dc.description.abstract	Many systolic algorithms and related design methodologies have been recently proposed. Frecuently, in these systolic algorithms practical considerations are not taken into account. Equitatively distributed load between processing elements, pipelined functional units etc, are desirable features when implementing systolic algorithms.In this paper we present a design methodology in which these features are considered. As an example, the methodology is applied to obtain a problem-size-independent, two-level pipelined 1D systolic algorithm with data contraflow to efficiently solve triangular systems of equations.
dc.description.abstract	Peer Reviewed

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