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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica |
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dc.contributor | Universitat Politècnica de Catalunya. HIPICS - Grup de Circuits i Sistemes Integrats d'Altes Prestacions |
dc.contributor.author | García Leyva, Lancelot |
dc.contributor.author | Calomarde Palomino, Antonio |
dc.contributor.author | Moll Echeto, Francisco de Borja |
dc.contributor.author | Rubio Sola, Jose Antonio |
dc.date | 2010 |
dc.identifier.citation | García, L. [et al.]. Turtle Logic: A new probabilistic design methodology of nanoscale digital circuits. A: IEEE international Midwest Symposium on Circuits and Systems. "53rd IEEE international Midwest Symposium on Circuits and Systems". Seattle, WA,: IEEE Press. Institute of Electrical and Electronics Engineers, 2010, p. 1101-1104. |
dc.identifier.citation | 10.1109/MWSCAS.2010.5548845 |
dc.identifier.uri | http://hdl.handle.net/2117/8873 |
dc.language.iso | eng |
dc.publisher | IEEE Press. Institute of Electrical and Electronics Engineers |
dc.relation | http://ieeexplore.ieee.org/search/searchresult.jsp?newsearch=true&queryText=10.1109%2FMWSCAS.2010.5548845&x=50&y=19&tag=1 |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Enginyeria electrònica::Circuits electrònics |
dc.subject | Nanoscale electronic devices |
dc.subject | Circuits digitals -- Disseny |
dc.subject | Nanotecnologia |
dc.title | Turtle Logic: A new probabilistic design methodology of nanoscale digital circuits |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/conferenceObject |
dc.description.abstract | |
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