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dc.contributor | Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors |
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dc.contributor | Universitat Politècnica de Catalunya. CAP - Grup de Computació d'Altes Prestacions |
dc.contributor.author | Paolieri, Marco |
dc.contributor.author | Quiñones, Eduardo |
dc.contributor.author | Cazorla Almeida, Francisco Javier |
dc.contributor.author | Valero Cortés, Mateo |
dc.date | 2010-02-05 |
dc.identifier.citation | Paolieri, M. [et al.]. An analyzable memory controller for hard real-time CMPs. "Ieee EMBEDDED SYSTEMS LETTERS", 05 Febrer 2010, vol. 1, núm. 4, p. 86-90. |
dc.identifier.citation | 10.1109/LES.2010.2041634 |
dc.identifier.uri | http://hdl.handle.net/2117/7462 |
dc.language.iso | eng |
dc.relation | http://ieeexplore.ieee.org/document/5401062/ |
dc.relation | info:eu-repo/grantAgreement/EC/FP7/216415/EU/Multi-core Execution of Hard-real-time Applications Supporting Analysability/MERASA |
dc.rights | info:eu-repo/semantics/openAccess |
dc.subject | Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
dc.subject | Magnetic memory (Computers) controllers |
dc.subject | Memòries magnètiques |
dc.subject | CMP |
dc.subject | WCET |
dc.title | An analyzable memory controller for hard real-time CMPs |
dc.type | info:eu-repo/semantics/publishedVersion |
dc.type | info:eu-repo/semantics/article |
dc.description.abstract | |
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