2026-04-13T07:49:15Zhttps://recercat.cat/oai/request

oai:recercat.cat:2445/2205492025-12-05T16:16:56Zcom_2072_1057col_2072_478823col_2072_478904col_2072_478917

00925njm 22002777a 4500 dc Manera Escalero, Rafel author Ballabriga, R. author Mauricio, J. author Kaplon, J. author Paterno, A. author Bandi, F. author Gómez, Sergio author Pulli, A. author Portero, S. author Silva, J. author Keizer, F. author d'Ambrosio, C. author Campbell, Michael author Gascón Fora, David author 2025-04-23T12:30:18Z 2025-04-23T12:30:18Z 2024 2025-04-23T12:30:18Z This work presents the analog circuitry of the FastRICH ASIC, a 16-channel ASIC, developed in a 65 nm CMOS technology specifically designed for the RICH detector at LHCb to readout detectors like Photomultiplier Tubes to be used at the LHC Run 4 and Silicon Photomultipliers candidates for Run 5. The front-end (FE) stage has an input impedance below 50 Ω and an input dynamic range from 5 μA to 5 mA with a power consumption of ∼5 mW/channel. The chip includes a Leading Edge Comparator (LED) and a Constant Fraction Discriminator (CFD) for time pick-off and a Time-to-Digital Converter (TDC) for digitization.  Detectors Circuits electrònics Radiació Detectors Electronic circuits Radiation The analog front end for FastRICH: an ASIC for the LHCb RICH detector upgrade