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RECERCAT author Martínez Pérez, Héctor author Catalán Pallarés, Sandra author Igual Peña, Francisco D. author Herrero Zaragoza, José Ramón author Rodríguez Sánchez, Rafael author Quintana Ortí, Enrique Salvador 2025-09 This paper advocates for a careful customization of the special general matrix multiplication (GEMM) kernels that are invoked from blocked routines for several relevant matrix factorizations in LAPACK, in order to improve their performance on modern multicore processors with hierarchical cache memories. To achieve this, we leverage a refined analytical model to dynamically tune the cache configuration parameters of GEMM for these kernels, taking into account the matrix operands’ dimensions, in order to improve cache occupation. In addition, toward the same goal, we accommodate a flexible development of architecture-specific micro-kernels for GEMM that allows us to select the option that, depending on the operands’ dimensions, ameliorates cache utilization. Our experiments for the LU and QR factorizations on two platforms, equipped with ARM (NVIDIA Carmel) and x86 (AMD EPYC) multi-core processors, demonstrate the benefits of this approach in terms of a better cache utilization and, in general, higher performance. Moreover, they also reveal the delicate balance between optimizing for multi-threaded parallelism versus cache usage as well as the positive effects of software prefetching.This work was supported by grants PID2020- 113656RB-C22, PID2019-107255GB, PID2021-126576NB-I00 and PID2021-123627OB-C52 of MCIN/AEI/10.13039/501100011033, by ‘‘ERDF A way of making Europe’’, and 2021-SGR-01007 of the Generalitat de Catalunya. Héctor Martínez is a postdoctoral fellow supported by the Consejería de Transformación Económica, Industria, Conocimiento y Universidades de la Junta de Andalucía. Sandra Catalán was supported by the grant RYC2021-033973- I, funded by MCIN/AEI/10.13039/501100011033 and the European Union ‘‘NextGenerationEU’’/PRTR. Funding Open Access funding provided thanks to the CRUE-CSIC agreement with Springer Nature.Peer ReviewedPostprint (published version) http://creativecommons.org/licenses/by/4.0/ Open Access Attribution 4.0 International Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors Dense linear algebra Computer architecture Multicore processors Cache memory Matrix factorization Cache-aware optimization of matrix multiplication and matrix factorizations on multicore processors Article