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   <dc:title>Enabling RISC-V SoC with high-performance storage capabilities</dc:title>
   <dc:creator>Izquierdo Santamaria, Mar</dc:creator>
   <dc:contributor>Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica</dc:contributor>
   <dc:contributor>Rodríguez Montañés, Rosa</dc:contributor>
   <dc:contributor>Deus, Pedro</dc:contributor>
   <dc:subject>Àrees temàtiques de la UPC::Enginyeria electrònica</dc:subject>
   <dc:subject>High performance computing</dc:subject>
   <dc:subject>RISC microprocessors</dc:subject>
   <dc:subject>Digital electronics</dc:subject>
   <dc:subject>Càlcul intensiu (Informàtica)</dc:subject>
   <dc:subject>Microprocessadors RISC</dc:subject>
   <dc:subject>Electrònica digital</dc:subject>
   <dc:description>This thesis focuses on enabling high performance storage capabilities in a RISC-V SoC through the integration and validation of an open source controller. Communication tests were carried out using SD cards on FPGA platforms, both in standalone environments and within the full system.</dc:description>
   <dc:date>2025-06-27</dc:date>
   <dc:type>Master thesis</dc:type>
   <dc:identifier>https://hdl.handle.net/2117/442707</dc:identifier>
   <dc:identifier>PRISMA-199664</dc:identifier>
   <dc:identifier>http://hdl.handle.net/2117/442707</dc:identifier>
   <dc:language>eng</dc:language>
   <dc:rights>Open Access</dc:rights>
   <dc:format>application/pdf</dc:format>
   <dc:publisher>Universitat Politècnica de Catalunya</dc:publisher>
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