<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-04-17T18:47:44Z</responseDate><request verb="GetRecord" identifier="oai:www.recercat.cat:2117/373480" metadataPrefix="oai_dc">https://recercat.cat/oai/request</request><GetRecord><record><header><identifier>oai:recercat.cat:2117/373480</identifier><datestamp>2026-01-30T09:14:14Z</datestamp><setSpec>com_2072_1033</setSpec><setSpec>col_2072_452950</setSpec></header><metadata><oai_dc:dc xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd">
   <dc:title>Common-mode voltage mitigation strategies using sigma-delta modulation in five-phase VSIs</dc:title>
   <dc:creator>Acosta Cambranis, Fernando Geovany</dc:creator>
   <dc:creator>Zaragoza Bertomeu, Jordi</dc:creator>
   <dc:creator>Berbel Artal, Néstor</dc:creator>
   <dc:creator>Capellá Frau, Gabriel José</dc:creator>
   <dc:creator>Romeral Martínez, José Luis</dc:creator>
   <dc:contributor>Universitat Politècnica de Catalunya. Doctorat en Enginyeria Electrònica</dc:contributor>
   <dc:contributor>Universitat Politècnica de Catalunya. Departament d'Enginyeria Electrònica</dc:contributor>
   <dc:contributor>Universitat Politècnica de Catalunya. MCIA - Motion Control and Industrial Applications Research Group</dc:contributor>
   <dc:contributor>Universitat Politècnica de Catalunya. (TIEG) - Terrassa Industrial Electronics Group</dc:contributor>
   <dc:subject>Àrees temàtiques de la UPC::Enginyeria electrònica::Electrònica de potència::Circuits de potència</dc:subject>
   <dc:subject>Voltage regulators</dc:subject>
   <dc:subject>Common-mode voltage</dc:subject>
   <dc:subject>Conducted EMIs</dc:subject>
   <dc:subject>five-phase VSI</dc:subject>
   <dc:subject>Power losses</dc:subject>
   <dc:subject>Sigma–delta modulation</dc:subject>
   <dc:subject>Total harmonic distortion</dc:subject>
   <dc:subject>Reguladors de voltatge</dc:subject>
   <dc:description>© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.</dc:description>
   <dc:description>Various sigma–delta ( S ¿ ) modulation techniques for reducing the maximum peak-to-peak amplitude of common-mode voltage (CMV) by 80% in a five-phase, high-frequency voltage source inverter (VSI) are proposed and evaluated in this article. These techniques are based on choosing a set of vectors that limits the CMV amplitude. Operating the VSI under high-frequency pulsewidth modulations (PWM) generates a large number of changes in the CMV levels, which leads to common-mode currents (CMCs) and conducted electromagnetic interferences (EMIs). The proposed modulation techniques achieve the following: 1) High-efficiency converter operation and output voltage with low total harmonic distortion (THD); 2) an 80% reduction in CMV peak-to-peak amplitude; 3) a decrease in the number of the CMV transitions, thus reducing the CMCs; and 4) a decrease in the conducted EMI amplitude. The use of single-loop and double-loop S ¿ modulators is analyzed by means of Matlab/Simulink and PLECS simulations. The implementation of the proposed modulation techniques has been experimentally evaluated using a five-phase VSI with silicon carbide semiconductors. In order to demonstrate the improved performance, the results obtained are compared with those of other PWM and space vector modulation techniques that also mitigate the CMV amplitude by 80% but lack the other improvements.</dc:description>
   <dc:description>Peer Reviewed</dc:description>
   <dc:description>Postprint (author's final draft)</dc:description>
   <dc:date>2022-10</dc:date>
   <dc:type>Article</dc:type>
   <dc:identifier>Acosta, F. [et al.]. Common-mode voltage mitigation strategies using sigma-delta modulation in five-phase VSIs. "IEEE transactions on power electronics", Octubre 2022, vol. 37, núm. 10, p. 11662-11672.</dc:identifier>
   <dc:identifier>0885-8993</dc:identifier>
   <dc:identifier>https://hdl.handle.net/2117/373480</dc:identifier>
   <dc:identifier>10.1109/TPEL.2022.3172657</dc:identifier>
   <dc:language>eng</dc:language>
   <dc:relation>https://ieeexplore.ieee.org/document/9769917/</dc:relation>
   <dc:relation>info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2019-111420RB-I00/ES/SISTEMA DE CONVERSION DE POTENCIA DC%2FDC AISLADO MULTIPUERTO DE ALTA EFICIENCIA Y DENSIDAD DE POTENCIA BASADO EN DISPOSITIVOS DE AMPLIO ANCHO DE BANDA PARA VEHICULOS ELECTRICOS/</dc:relation>
   <dc:rights>Open Access</dc:rights>
   <dc:format>11 p.</dc:format>
   <dc:format>application/pdf</dc:format>
   <dc:publisher>Institute of Electrical and Electronics Engineers (IEEE)</dc:publisher>
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