2026-04-13T04:11:51Zhttps://recercat.cat/oai/requestoai:recercat.cat:2117/1669552025-07-16T22:18:55Zcom_2072_1033col_2072_452949
RECERCAT
author
Bosch Pons, Jaume
author
Álvarez Martínez, Carlos
author
Jiménez González, Daniel
2019-05-07
The most common model to use co-processors/accelerators
is the master-slave model where the slaves (coprocessors/
accelerators) are driven by a general purpose
cpu. This simplifies the management of the accelerators
because they cannot actively interact with the runtime and
they are just passive slaves that operate over the memory
under demand. However, the master-slave model limits system
possibilities and introduces synchronization overheads that
could be avoided.
To overcome those limitations and increase the possibilities
of accelerators, we propose extending task based programming
models (like OpenMP [1] or OmpSs) to support some runtime
APIs inside the FPGA co-processor. As a proof-of-concept,
we implemented our proposal over the OmpSs@FPGA environment
[2] adding the needed infrastructure in the FPGA
bitstream and modifying the existing tools to support creation
of children tasks inside a task offloaded to an FPGA accelerator.
In addition, we added support to synchronize the children
tasks created by a FPGA task regardless they are executed in a
SMP host thread or they also target another FPGA accelerator
in the same co-processor.
http://creativecommons.org/licenses/by-nc-nd/3.0/es/ Open Access Attribution-NonCommercial-NoDerivs 3.0 Spain
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors
High performance computing
Heterogeneous computing
Heterogeneous computing
Device offloading
Task based parallel programming models
High-performance computing
Càlcul intensiu (Informàtica)
Computació heterogènia
Supporting task creation inside FPGA devices
Conference report