<?xml version="1.0" encoding="UTF-8"?><?xml-stylesheet type="text/xsl" href="static/style.xsl"?><OAI-PMH xmlns="http://www.openarchives.org/OAI/2.0/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/ http://www.openarchives.org/OAI/2.0/OAI-PMH.xsd"><responseDate>2026-04-17T18:59:55Z</responseDate><request verb="GetRecord" identifier="oai:www.recercat.cat:2117/105650" metadataPrefix="marc">https://recercat.cat/oai/request</request><GetRecord><record><header><identifier>oai:recercat.cat:2117/105650</identifier><datestamp>2025-07-23T07:22:08Z</datestamp><setSpec>com_2072_1033</setSpec><setSpec>col_2072_452951</setSpec></header><metadata><record xmlns="http://www.loc.gov/MARC21/slim" xmlns:dcterms="http://purl.org/dc/terms/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:doc="http://www.lyncode.com/xoai" xsi:schemaLocation="http://www.loc.gov/MARC21/slim http://www.loc.gov/standards/marcxml/schema/MARC21slim.xsd">
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      <subfield code="a">dc</subfield>
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      <subfield code="a">Morales Pérez, Cristian</subfield>
      <subfield code="e">author</subfield>
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      <subfield code="c">2017-05</subfield>
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      <subfield code="a">Modern computing architectures change rapidly and exhibit high levels of&#xd;
complexity and heterogeneity. For example, the Barcelona Supercomputing&#xd;
Center (BSC) will have one general purpose cluster and three smaller clusters&#xd;
with Emerging Technologies like Many Core architecture from Intel, Power from&#xd;
IBM and ARMv8 from Fujitsu. These are technologies currently being developed&#xd;
to accelerate the arrival of the new generation of pre-exascale supercomputers.&#xd;
We have analysed these architectures in order to gain knowledge and experience&#xd;
to get the best performance possible from them running HPC applications that&#xd;
exploit the strengths of each architecture.&#xd;
Additionally, we have run a benchmark suite on each available computer&#xd;
architecture with the purpose of characterize them. In order to complement the&#xd;
benchmark results, we have decided to analyse the execution of each benchmark&#xd;
with a performance analysis tool. There already exist several performance&#xd;
analysis tools which cover different performance areas like hardware events&#xd;
counting, performance simulation, traces, etc. However, these tools are&#xd;
dependent of being ported to modern computing architectures and they&#xd;
normally have different usages for different architectures.&#xd;
We propose a solution based on the perf_event interface, which is included&#xd;
on the Linux kernel, that allows us to analyse the benchmark execution on the&#xd;
different modern computing architectures and it allows users easily to get&#xd;
performance information of their applications. The information that we provide&#xd;
with our solution are a sampling trace of hardware events, a profiling report and&#xd;
monitoring information of CPU and memory. Our solution enhances the&#xd;
performance results of other tools with extra features that help a better&#xd;
understanding of the bottlenecks of applications and/or architectures, and so,&#xd;
benchmarking. In addition, our proposal can be used in any system with Linux.</subfield>
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      <subfield code="a">Àrees temàtiques de la UPC::Informàtica</subfield>
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      <subfield code="a">Computer architecture</subfield>
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      <subfield code="a">Benchmarking (Management)</subfield>
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      <subfield code="a">anàlisi</subfield>
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      <subfield code="a">arquitectures</subfield>
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      <subfield code="a">analysis</subfield>
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      <subfield code="a">architectures</subfield>
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   <datafield tag="653" ind2=" " ind1=" ">
      <subfield code="a">performance</subfield>
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      <subfield code="a">tool</subfield>
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      <subfield code="a">Arquitectura d'ordinadors</subfield>
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      <subfield code="a">Referenciació (Economia)</subfield>
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      <subfield code="a">Study and Benchmarking of modern computing architectures</subfield>
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